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Graduate level project related to VLSI

$30-250 USD

Imefungwa
Imechapishwa almost 9 years ago

$30-250 USD

Kulipwa wakati wa kufikishwa
I am looking for complete graduate level project in VLSI with verilog coding and synthesis
Kitambulisho cha mradi: 8292191

Kuhusu mradi

19 mapendekezo
Mradi wa mbali
Inatumika 9 yrs ago

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19 wafanyakazi huru wana zabuni kwa wastani $89 USD kwa kazi hii
Picha ya Mtumiaji
Dear sir I have more than 8 years experience in digital design using verilog and I am the top rated verilog freelancer with more than 170 verilog projects done at freelancer.com please check the following link : https://www.freelancer.com/freelancers/skills/Verilog_VHDL/ I will provide you with the following: 1- synthesizable verilog code 2- simulation and test benches 3- online assistance using team viewer 4- full documentation for your graduation project Please give me more details about the required work so that i can estimate the deadline and the required budget
$30 USD ndani ya siku 0
4.9 (475 hakiki)
8.1
8.1
Picha ya Mtumiaji
I would like to bid this job because I am really suitable for job description: First: I am an C++/C/Mathlab/Electronics engineer who is very familiar with C++/C/Mathlab/VHDL/Verilog. In fact, I have done so many project of VHDL/Verilog(Karatsuba multiplier, Nintendo design, encryption algorithm like Sax Hash, Bernstein Hash, HummingBird...Especialy, I participated in a Walker Recognition project(data from Camera to Human Detection(image processing-HOG feature and Adaboost) and display in VGA). Besides,,I implemented the image conpression (wavelet transform). Especially, I have done some project related to VLSI, These needs to add some constrains in the gate delay, after that we can see the change in simulation, compared to the version which doesn't have gate delay. Finally, I am very good in English (IELTS 6.0) and I have several year of researching so I can fully understand your requirement and understand fully about the papers.. Please contact me and let me know if you want any special requirement. Thank you.
$30 USD ndani ya siku 10
4.9 (89 hakiki)
6.9
6.9
Picha ya Mtumiaji
Dear Sir, I'm the best Verilog freelancer in this site. I have worked on many projects in graduate level and VLSI also. A project which is published on IEEE conference is given to you. Verilog coding and VLSI implementation. I would assure that you will receive a high standard project. Please contact me and we can discuss more. Thanks
$30 USD ndani ya siku 0
4.9 (111 hakiki)
6.5
6.5
Picha ya Mtumiaji
I am an Electronics and Instrumentation Engineer from BITS Pilani. I have a project on "Direct Mapped Cache Controller" which I forward it to you. I also have few other projects with all the files and can help you with those as well. I will also forward you a complete report of it. I hope that you do contact me. Thanks
$30 USD ndani ya siku 0
5.0 (79 hakiki)
6.2
6.2
Picha ya Mtumiaji
I am an Electrical Engineer having specialization in Electronics and Control, teaching in Electrical Department FAST National University Pakistan. I am also continuing my MS degree in Electrical Engineering with specialization in Control. I have taught the followings courses, and also supervised Projects related to these subjects. 1. Control System Design & Modelling (Matlab & Simulink) 2. Digital Logic Design (Verilog, VHDL) 3. Digital System Design (Verilog, VHDL) 4. Computer organization & Assembly Language (8086 processor, 8051 controller, Arduino, PIC) 5. Electric Machines Design and Analysis 6. Circuit Analysis and Design 7. PCB Design (Proteous AREAS + Multisim Ultiboard) I assure you, if you assign your project to me, you surely gonna work with me in future.
$50 USD ndani ya siku 3
4.9 (33 hakiki)
5.1
5.1
Picha ya Mtumiaji
I have worked on various DSP filter designs, pipelined processor designs and many other DLDs. We may discuss about your project and get clear idea about implementation
$30 USD ndani ya siku 1
5.0 (5 hakiki)
2.2
2.2
Picha ya Mtumiaji
A proposal has not yet been provided
$35 USD ndani ya siku 3
0.0 (0 hakiki)
0.0
0.0
Picha ya Mtumiaji
I have 6+ years experience in graduate level project development and Application development in urgent basis. i can finish in 1 day itself
$45 USD ndani ya siku 3
0.0 (0 hakiki)
0.0
0.0
Picha ya Mtumiaji
Right now I am doing my PHD in image processing so got a very good in touch with the subject.I hope this will make me a perfect person to deal with it
$155 USD ndani ya siku 6
0.0 (0 hakiki)
0.0
0.0
Picha ya Mtumiaji
I will give you whole project in verilog because i have done so many projects in verilog.. iam expert in verilog, systemverilog, uvm. if u have any doubts i will give my 100% support to you.
$210 USD ndani ya siku 3
0.0 (0 hakiki)
0.0
0.0
Picha ya Mtumiaji
I have read and fully understood your requirements.. Please open chat to discuss further… _____________________-----------------------------------_____________________________------------------
$133 USD ndani ya siku 4
0.0 (0 hakiki)
0.0
0.0
Picha ya Mtumiaji
I am Debashis, working in the VLSI domain for the past 4 years. My primary expertise are in VLSI Design and Verification. I have specialized in VLSI during my Masters. I have been involved in projects of designing complex systems using Verilog, System Verilog to be deployed to ASIC and FPGA. I would like to know if you have your own ideas about some projects to pursue. I have the following suggestions: - FPGA based 4-bit RISC or CISC processor with basic instruction set - ASIC design of a complex number multiplier - FPGA Based Space Vector PWM Control IC For Three Phase Induction Motor Drive
$111 USD ndani ya siku 5
0.0 (0 hakiki)
0.0
0.0
Picha ya Mtumiaji
I'm interested to do this project. I'm a fresh graduate and recently did my VLSI Project of 8 bit ALU Layout , Schematic and Complete Verilog Coding. I'm confident that I'll be able to complete this project,
$200 USD ndani ya siku 5
0.0 (0 hakiki)
0.0
0.0
Picha ya Mtumiaji
Projects which I completed as mentioned below which i can give. 1) Design, Synthesize and Simulation of Address Generation Unit in Verilog HDL. 2) Design, Synthesize and simulation of I2C master controller by Verilog HDL.
$111 USD ndani ya siku 3
0.0 (0 hakiki)
0.0
0.0
Picha ya Mtumiaji
I will deliver the project within a week. Verified.
$67 USD ndani ya siku 4
0.0 (0 hakiki)
0.0
0.0
Picha ya Mtumiaji
I have been working with verilog more then one year. I have some ended projects on verilog, which work in hardware, not only in simulator. And a have been working with VHDL more then 3 years.
$30 USD ndani ya siku 3
0.0 (0 hakiki)
0.0
0.0

Kuhusu mteja

Bedera ya INDIA
Bangalore, India
5.0
1
Njia ya malipo imethibitishwa
Mwanachama tangu Ago 18, 2015

Uthibitishaji wa Mteja

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