Very-large-scale integration (VLSI) Kazi na Mashindano
Peana kwa umma kazi za biashara yako kwenye Freelancer. Tunakuunganisha na zaidi ya wafanyakazi huru millioni 26.9 wenye ujuzi kutoka kote ulimwenguni.
Wafanyakazi huru wetu wana ujuzi usiokuwa na kikomo. Hii ni kama: ubunifu wa logo, ubunifu wa picha, ubunifu wa tovuti, huduma ya kiufundi, utafiti wa masoko, uchapishaji, kutafsiri, na uingizaji data (kati ya nyinginezo nyingi).
Unaweza kuajiri mfanyakazi huru kuanzi $30 - huku mradi wa kawaida ukikamilika kwa Dolla $200. Haijalishi ni soko ipi unayotaka kufikia, utapata Wafanyakazi huru kutoka katika pembe zote za ulimwengu tayari kuvukisha biashara yako mipaka ya kawaida.
Pitia Kazi kwenye Freelancer
|Multiplier Cell Desigen for Multiple Applications||Multiplier cell design with the application of 8X8 multiplier, related to VLSI design (very large scale integration). required : some report corrections in chapter 1 and 2 regarding the references and report writing. I have a attached a copy of the report and a paper specifying the corrections.||6||Elektroniki, Kuandika Ripoti, Uhandisi wa Umeme, Ubunifu wa Circuit, Very-large-scale integration (VLSI)||Dec 16, 2017||Dec 16, 2017Imeisha||$21|
|MULTIPLIER CELL DESIGN||Multiplier cell design with the application of 8X8 multiplier, related to VLSI design (very large scale integration). required : some report corrections in chapter 1 and 2 regarding the references and report writing. I have a attached a copy of the report and a paper specifying the corrections.||4||Elektroniki, Kuandika Ripoti, Fomu za Kielektroniki, Article Writing, Very-large-scale integration (VLSI)||Dec 12, 2017||Dec 12, 2017Imeisha||$23|
|CMOS VLSI and should be done on virtuoso Cadence||c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.||5||CAD/CAM, Uhandisi wa Umeme, Ubunifu wa Circuit, Very-large-scale integration (VLSI)||Nov 27, 2017||Nov 27, 2017Imeisha||$555|
|UVM verification of memory controller - open to bidding||Need someone to verify a memory controller using UVM environment. CAN bus is used as a memory cycle initiator and write/read burst transactions need to be verified.||5||Perl, Verilog / VHDL, Skripti ya Shell, FPGA, Very-large-scale integration (VLSI)||Nov 21, 2017||Nov 21, 2017Imeisha||$375|
|Design OTA in 180nm in Cadence Virtuoso||I want to design OTA in Cadence vituoso with 180 nm Technology and some other specification||2||Elektroniki, Verilog / VHDL, Very-large-scale integration (VLSI)||Nov 13, 2017||Nov 13, 2017Imeisha||$225|
|DMDG mosfet||In this project numerically simulated Dual material Double gate MOSFETs structure through ATLAS device simulator. Analysis and comparative study of the electrical characteristics of DMDG MOSFETs with that of conventional SOI MOSFETs has been done. DMDG MOSFETs has become a important part of VLSI research. An analytical model is developed using ATLAS simulator to analyze short channel effects (SCE)...||0||Very-large-scale integration (VLSI)||Nov 6, 2017||Nov 6, 2017Imeisha||-|
|INTEGRATION API Expert to join TEAM||Looking for an expert to join my team with expert level integration REST api and ETL experience. Not looking for " I am so F****ng experience, 4 years, I know life, I know it all" type of people. Those can go "F****" themselves. Looking for Qualities below: 1) Honest 2) Driven to be a part of something awesome 3) Self-starter 4) Ability to work fast, dynamic and creative....||5||Web Scraping, PeopleSoft, Very-large-scale integration (VLSI), Data Extraction, API||Oct 22, 2017||Oct 22, 2017Imeisha||$27|
|VLSI PROJECTS||FIND THE ATTACHED IEEE [url imeondolewa, ingia kutazama] REQUIREMENTS||4||Verilog / VHDL, FPGA, Very-large-scale integration (VLSI)||Oct 11, 2017||Oct 11, 2017Imeisha||$86|
|assembles with technical projects||Future technologies will allow the integration of hundreds of billions of transistors on a single chip allowing the fabrication of chips with hundreds of processing cores. So, IC designers should focus on the communication between these cores in order to meet the design requirements in terms of speed, area, power consumption, and time to market constraints. Using conventional parallel buses to tra...||2||C Programming, Elektroniki, Verilog / VHDL, Software Iliyopachikwa, Very-large-scale integration (VLSI)||Oct 4, 2017||Oct 4, 2017Imeisha||$427|
|Transistor modelling||Project objectives : This research includes the development of the strong, robust transistor model which will best suitable for the microwave amplifier application. This model can be used to get some linear and nonlinear measurements, which consists of design, development and circuit analysis of HEMT based FET model and also states the experimental result of existing models. Using AWR microwa...||0||Verilog / VHDL, Very-large-scale integration (VLSI)||Sep 8, 2017||Sep 8, 2017Imeisha||-|