Sending and receiving tcpip xgmii packets over SFP+

Inaendelea Ilichapishwa Miaka 5 iliyopita Kulipwa wakati wa kujifungua
Inaendelea Kulipwa wakati wa kujifungua

This is an FPGA/Verilog project to send some TCP packets over 10g SFP+ network to a tcp server.

FPGA Verilog / VHDL

Kitambulisho cha Mradi: #16739031

Kuhusu mradi

3 mapendekezo Mradi wa mbali Ipo mtandaoni %project.latestActivity_relativeTime|badilisha%

3 wafanyakazi huru wanazabuni wastani wa $417 kwa kazi hii

quandangvan

A proposal has not yet been provided

$500 USD kwa siku 7
(Maoni 15)
4.7
punamsengupta

Dear Sir, I have about 7 years of experience in verilog and system verilog, I keenly want to work on this project. Thanks, Punam

$250 USD kwa siku 15
(Maoni 13)
3.8