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Xilinx Zynq 7020 / GPS Software Defined Radio Receiver / Baremetal / Petalinux

€750-1500 EUR

Inaendelea
Imechapishwa over 2 years ago

€750-1500 EUR

Kulipwa wakati wa kufikishwa
Development to be performed on Vivado 2019.1 version using Xilinx Zynq 7020 in order to: - Acquire Galileo and GPS signals in real time (FFT and IFTT) - Track Galileo and GPS signals in real time (DLL and PLL) - Demodulation of the Galileo and GPS signals (bit synchronisation and demodulation) Timeline:30 days
Kitambulisho cha mradi: 30933461

Kuhusu mradi

12 mapendekezo
Mradi wa mbali
Inatumika 3 yrs ago

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Picha ya Mtumiaji
Hello! This is one of the most interesting projects I saw here. I can help you with it, but need some clarification. First of all Verilog or VHDL? The second, do you need to implement only deconvolution blocks to detect signals? Or additional postprocessing algorithms, too? What about cold/warm/hot starts? Do you need to implement almanac and ephemeride map? What is the source of signals? Are signals ready for convolution? Or they need additional preprocessing? It will be good if you share details. Price is discussable.
€1,125 EUR ndani ya siku 21
0.0 (0 hakiki)
0.0
0.0
12 wafanyakazi huru wana zabuni kwa wastani €1,309 EUR kwa kazi hii
Picha ya Mtumiaji
Hi, Dear Client! *********************************************************** SHARING IDEAS AND INSPIRATIONS FOR YOUR PROJECT. PROVIDING A GOLDEN OPPORTUNITY TO RECEIVE THE BEST TECHNICAL SERVICE. *********************************************************** Thanks for your post. Nice to meet suitable me project. I have 8+ years of Xilinx FPGA/Cortex ARM development experience, completed many projects related to real-time signal processing such as RADAR and various wireless systems using Vivado, and have expertise and practical experience in RF/SDR. Recently I completed an independent project (schematic/PCB, firmware programming) for Galileo / GPS trackers. You can see my sincere and dedicated work attitude and I will go the extra mile for you. Please contact me. Regards. Ait.
€1,500 EUR ndani ya siku 25
4.8 (13 hakiki)
4.8
4.8
Picha ya Mtumiaji
Hi, I am a senior digital design engineer, I have a broad knowledge of digital design in ASIC and FPGA using both VHDL and Verilog. I am using Vivado, ISE, and Quartise for FPGA, using DC, ICC, and prime-time for ASIC. I will provide you a professional report about your project with citation and scientific formatting. Please contact me to know more about your needs. Regards, moaaz.
€750 EUR ndani ya siku 30
4.9 (36 hakiki)
4.7
4.7
Picha ya Mtumiaji
Dear sir, I am a digital design engineer expert in FPGA and ASIC design flows using Verilog and VHDL programming. Also, I am experienced with Vivado, ISE, Vivado IPs, SDK, Quartus, Design Compiler, IC Compiler and others. Please contact me to discuss more about this project. Kindest regards.
€1,125 EUR ndani ya siku 7
5.0 (25 hakiki)
4.8
4.8
Picha ya Mtumiaji
I have more than 10 years of experience in designing electronic circuits in the fields of GSM/GPRS, 3G, LTE, GPS/GLONASS, Bluetooth, Audio Amplifier, RF 315/433Mhz, Zigbee, Lora, Solar, Mosbus... .. During this time, I have designed thousands of boards from concept to PCB and then SMT. I have experienced dozens of projects from small to large, including typical projects with GPS applications such as: Wireless lighting control, ARM programming Kit, Smart Home, Embedded computer, Smart Tracker for Cars, Tracker for Cycle, Navigation for ships... I need more details: What specific work will I do, do I need to complete a prototype? Is this design used in civil or industrial environments, is it too harsh? Are housing design requirements available? What is the maximum GPS error? What standard is the interface between hardware and software?... I look forward to working with you!
€1,444 EUR ndani ya siku 20
4.9 (3 hakiki)
3.8
3.8
Picha ya Mtumiaji
Hello you. i just read your desctiptions about project. I have 5 years experience about design and write code for FPGA board use VHDL . if you need any support to do this project, please contact with me to discuss more. Thanks for watcging my bid.
€833 EUR ndani ya siku 20
4.9 (4 hakiki)
2.7
2.7
Picha ya Mtumiaji
Dear Client I'm interested in your project and I can do it with the perfect method and time. I'm an expert in the design and development of analog, RF and digital integrated circuits using Cadence virtuoso, synopsis, Orcad, Quartus, Modelsim, Vivado, Electric VLSI... For more information, please send me a message in my inbox. Best regards
€1,300 EUR ndani ya siku 20
0.0 (0 hakiki)
0.0
0.0
Picha ya Mtumiaji
- previous experience in such topics; - eager to discuss a lot in this chat stream; - degree stats - maths;
€1,500 EUR ndani ya siku 5
0.0 (0 hakiki)
0.0
0.0
Picha ya Mtumiaji
Hi, Sir. I have gone through your project details. I have ever bidden to your prior project. I can do your project perfectly as I am an expert in FPGA embedded systems and digital signal processing. Please contact me, and I will do my best for your project. Thanks.
€1,250 EUR ndani ya siku 30
0.0 (0 hakiki)
0.0
0.0

Kuhusu mteja

Bedera ya FRANCE
Toulouse, France
0.0
0
Njia ya malipo imethibitishwa
Mwanachama tangu Jun 28, 2021

Uthibitishaji wa Mteja

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